Design-Reuse

RISC-V: The Open-Source Revolution in CPU Architecture

RISC-V is an open-source Instruction Set Architecture (ISA) that rapidly transforms the CPU design and development landscape. Unlike proprietary ISAs, RISC-V allows free access to architecture ...
Electronic Design

NPU is Built Around RISC-V Core

IP that’s built on a RISC-V vector processing CPU. The platform has been augmented to support artificial-intelligence/machine ...
Design-Reuse

Quintauris and SiFive Announce Partnership to Advance RISC-V Ecosystem Development

Munich, Germany — Quintauris, a global provider of RISC-V-based solutions, today announced a strategic partnership with SiFive, the leading provider of RISC-V processor IP. The collaboration will ...
Digi Times

NEWS TAGGED RISC-V

Tenstorrent, under Jim Keller, cut 7.5% of its staff to boost teamwork, launched the Ascalon RISC-V CPU in China for AI and HPC markets, and is partnering with CoreLab and former... Qualcomm's ...
CRN

Qualcomm Acquires RISC-V Chip Designer Ventana To Boost CPU Efforts

The chip design giant says Ventana’s expertise in RISC-V, a free and open alternative to the Arm and x86 instruction set architectures, will enhance its CPU engineering capabilities and complement ...
Semiconductor Engineering

Step Towards A 5G Software-Defined RAN Over A Fully Open-Source Parallel RISC-V Architecture (ETH Zurich)

A technical paper titled “Efficient Parallelization of 5G-PUSCH on a Scalable RISC-V Many-core Processor” was published by researchers at ETH Zurich. “5G Radio access network disaggregation and ...